ls2p0500
ls2p0500
loongson 2p0500 is an soc designed for the control system of single/multi-function printers and is a core controlling component in printing and scanning devices. the chip employs heterogeneous cpu topology, incorporating loongson la364 and la132 processor cores as well as a 512kb shared l2 cache. it integrates various functional modules (such as ddr3, gmac, usb, printing interfaces, scanning interfaces, emmc, and pwm) and a power management and control module. thus, the chip has wide application in printing, scanning, copying, and other typical scenarios.
ls2p0500 specification
kernel
64-bit main cores and 32-bit small cores
frequency
700mhz for main cores and 400mhz for small cores
power consumption
<1.8w (dynamic frequency scaling supported)
high-speed i/o
three usb 2.0 and two gmac
other interfaces
printer, scanner, spi, i2c, uart, sdio, emmc, dac, pwm, pmio, gpio, rtc, jtag, etc.
microarchitecture
triple-issue out-of-order execution la364 and single-issue la132
l1 instruction cache
32kb for main cores and 4kb for small cores
l1 data cache
32kb for main cores and 4kb for small cores
l2 cache
512kb shared by main cores
memory controller
32-bit ddr3-800
